Lead Analog Design Engineer
Sterling St. James, LLC
Pavia
20
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Azienda: Sterling St. James, LLC Pavia
Pavia, PV, Italy
85, to , + Bonus + SIGNING BONUS + Paid Relocation
This opportunity is for a leading role within our Optical PHY (CE-OPHY) team, part of our Central Engineering division. The team is focused on pioneering high-speed and optical transceivers to meet the growing demand for bandwidth in data centers powering social media, video-on-demand, gaming, and real-time data streams. We are dedicated to creating innovative, cutting-edge chips and subsystem solutions that redefine data rates and power efficiency.
Main Duties
As a Senior Principal Analog Design Engineer, you will lead the design cycle of intricate analog circuits. Key responsibilities include:
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Design & Strategy: Analyze block specifications, take charge of transistor-level design, and choose optimal topologies. Design entire analog macros or I Ps from conception to mass production.
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Testing & Validation: Model and validate circuit blocks. Oversee and guide layout activities, set clear guidelines, and conduct thorough post-layout verifications to ensure design accuracy.
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Teamwork & Guidance: Collaborate closely with engineering teams to improve existing solutions and engage in cross-functional meetings. Train and mentor junior designers to enhance team expertise and technical capabilities.
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Project Oversight: Manage pre-silicon tasks like simulation and modeling and post-silicon tasks such as lab characterization, debugging, and correlating measurements to simulations through high-volume production.
Desired Candidate
We are seeking an experienced engineer with deep analog IC design knowledge and a drive to push technological boundaries.
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Educational Background & Experience: Master's degree or Ph. D. in Electrical Engineering or related field, along with 12-15 years of professional experience.
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Technical Expertise: Proven track record in IC design from architecture definition to volume production. Solid experience in analog design, particularly in the multi-G Hz range, is essential. Proficiency in custom analog layout supervision, standard EDA CAD tools, and design debugging for simulation-measurement correlation is crucial.
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Preferred Skills: Experience with multi- Gbps electrical Ser Des or electro-optical transceivers is highly desirable. Knowledge of advanced CMOS nodes, including FinFET, is advantageous.
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Interpersonal Skills: Strong communication, presentation, and documentation skills. Proficiency in written and spoken Italian and English (minimum B2 level) is required due to our international team and location.
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Work Arrangement: Full-time on-site role based in Pavia, Italy.
✔ Sterling St. James, LLC
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